Remaining conversions to std

[Poul-Henning Kamp]

In message <CAJV_h0ZYBgiT-rNuUgcsN7fOX4ENJ1L0wDcvGccDqn63fXxq_A at mail.gmail.com>
, Federico Schwindt writes:
>--f46d044402f401155b04fc7df6fc
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>I was thinking we edit the expression in vcc instead of erroring with
>"Wrong argument type" if formats don't match.
>Allowed conversions would be:
>
>TIME to REAL and INT
>REAL to TIME and INT
>INT to TIME and REAL
>
>I believe it would be relatively easy but do we want it?

The point here is that you have no way to ask for REAL variable
in the first place, so how will you trigger the conversion ?

I'd rather stick with the current (simple) rule that the only
implicit conversions are to STRING, everything else must be
commanded.


-- 
Poul-Henning Kamp       | UNIX since Zilog Zeus 3.20
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